专利名称:Frequency detection circuit and data
processing apparatus
发明人:Shinya Shimasaki申请号:US10744788申请日:20031222公开号:US07134042B2公开日:20061107
专利附图:
摘要:A frequency detection circuit according to the present invention has a statusholding register for storing rise information and fall information about a check targetclock and outputting an error detection signal showing frequency abnormality when
information showing the next edge (a fall or a rise) from a rise or a fall of the checktarget clock is not stored, a rise/fall detection circuit for respectively detecting a rise anda fall of the check target clock and outputting a rise detection signal in response to therise and a fall detection signal in response to the fall, a sampling clock generation circuitfor generating sampling clock for storing the information about the check target clock,and an edge detection signal generation circuit for outputting an edge detection signalwhich is an edge detection result of the check target clock based on the rise detectionsignal and the fall detection signal.
申请人:Shinya Shimasaki
地址:Kanagawa JP
国籍:JP
代理机构:Ostrolenk, Faber, Gerb & Soffen, LLP
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