专利名称：WAVEFORM-BASED DIGITAL GATE
MODELING FOR TIMING ANALYSIS
发明人：SOROUSH ABBASPOUR,Peter
Feldmann,Safar Hatami
申请号：US13071029申请日：20110324
公开号：US20120245904A1公开日：20120927
专利附图：
摘要：In one embodiment, the invention is a method and apparatus for waveform-based digital gate modeling for timing analysis. One embodiment of a method for
modeling a gate of an integrated circuit chip includes building a transform matrix thatindexes each input waveform/output waveform pair in a gate library to a plurality ofdifferent capacitive loads, obtaining an input waveform and a capacitive load associatedwith the gate, and, mapping the input waveform and the capacitive load to an outputwaveform for the gate, in accordance with the transform matrix.
申请人：SOROUSH ABBASPOUR,Peter Feldmann,Safar Hatami
地址：Ossining NY US,New York NY US,Los Angeles CA US
国籍：US,US,US
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