专利名称:Cache flush apparatus and computer system
having the same
发明人:Masubuchi, Yoshio, c/o Kabushiki Kaisha
Toshiba,Kano, Takuya, c/o Kabushiki KaishaToshiba,Sakai, Hiroshi, c/o Kabushiki KaishaToshiba
申请号:EP97115044.6申请日:19970829公开号:EP0828217A1公开日:19980311
专利附图:
摘要:Addresses of all of dirty blocks of a cache memory (20) are, by an updateaddress registering section (33), stored in one of plural regions of an update addressmemory (32). When a certain cache block is brought to a dirty state and then suspendedfrom the dirty state, the update address removing section (34) removes the address fromthe region. When cache flush is performed, a flush executing section (35) sequentiallyfetches the addresses of the dirty blocks from each region to issue, to the system bus(40), a command for writing-back data indicated by the address into the main memory(51) so that the contents of all of the a dirty block are written-back into the mainmemory (51). Therefore, the cache flush apparatus according to the present invention isable to shorten time required to perform the cache flush procedure and to improve theperformance of a computer system having the cache flush apparatus.
申请人:KABUSHIKI KAISHA TOSHIBA
地址:72, Horikawa-cho, Saiwai-ku Kawasaki-shi JP
国籍:JP
代理机构:Henkel, Feiler, Hänzel & Partner
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