Error correcting system

专利名称：Error correcting system

发明人：Nagumo, Masahide,Inagawa, June,Kojima,

Tadashi

申请号：EP82109564申请日：19821015公开号：EP0096109A3公开日：19841024

专利附图：

摘要：An error correcting system uses an error location polynominal defined bydouble correction BCH codes each consisting of the elements of Galois field GF(2m),thereby to generate error locations σ and σ and error patterns e, and e. The system has a

first data processing system (401) for performing only additions and multiplications togenerate error locations σ and σ and a second data processing system (402) forperforming only additions and mutiplica- tions to generate error patterns e and e. Thefirst data processing system (401) comprises a syndrome generator (41), a memory (43),an arithmetic logic unit (44), registers (45A) to (45C), latch circuits (46A) to (46F), registers(47A) to (47F), adder circuits (48A) and (48B) and a zero detector (49). The second dataprocessing system (402) comprises a gate circuit (50), latch circuits (46H) and (46G), anarithmetic logic unit (44), registers (45A) to (45C) and a memory (43).

申请人：KABUSHIKI KAISHA TOSHIBA

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