专利名称：Process for fabricating a semiconductor
device
发明人：Masahiko Yanagi申请号：US07/791527申请日：19911114公开号：US05173448A公开日：19921222
摘要：The present invention provides a process for fabricating a semiconductor deviceincluding the steps of: depositing a CVD film by a bias ECRCVD process on a wiring layerhaving an intended contact region in which a wiring line are made wider than in otherregions; coating planarly the CVD film with a resist film; etching the resist film back so asto expose a protuberance of the CVD film formed above the inteded contact region; andetching the protuberance and the CVD film thereunder to open a contact hole down tothe intended contact region of the wiring layer.
申请人：SHARP KABUSHIKI KAISHA
代理机构：Nixon & Vanderhye
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